A 700M Sample/s 6 b read channel A/D converter with 7 b servo mode

This 6 b CMOS analog to digital converter (ADC) for hard disk drive (HDD) applications has a 7 b mode for servo signal processing. The top level block schematic of the ADC is shown in this paper. The input is sampled and held by the sample and hold (S/H) circuit. The output of the S/H is processed by a circuit called the 7b interface which enables operation of the 7 b mode. In the 6b mode this circuit acts as a short. The output from this circuit is fed into the comparator array which converts the input signal into a digital thermometer code which is converted to a 1 of 64 code by the bubble correction logic. This in turn is fed into a ROM type encoder that generates the final 6 b digital output.