Analysis and experimental validation of power distribution network with multi-slots parallel-plane structure

This paper presents the analysis of power distribution network impedance and loop inductance of irregular parallel-plane structures and multi-slots plane-pair structures by using the plane-pair partial element equivalent circuit method(PPP). The influence of slot area occupancy rate (AOR) on impedance and loop inductance is investigated for various structures. The test structure is designed and fabricated to validate the influence of AOR on impedance and loop inductance of the PDN. The simulation and measurement of the structure impedance are performed up to 10GHz, and the good agreement are obtained between the simulation and the experiment.