A new 1200 V HVIC with high side edge trigger in order to solve the latch on failure by the negative VS surge

This paper investigates the root cause of the latch on failure by a short turn-on input signal with a negative VS surge and proposes a new 1200 V HVIC with a high side edge trigger in order to solve the latch on failure. The proposed HVIC is fabricated using a 1.2 μm 1200 V BCDMOS process. The experimental results show the latch on failure no longer occurs on the new 1200 V HVIC because it doesn't overlap the VS recovery period and the RESET pulse period. The proposed HVIC can be applied to IPM modules (intelligent power modules) and APM modules (automotive power modules) which require a more robust HVIC solution.