Effect Of body bias and temperature on snapback for a SOI-LDMOS transistor

In this paper we have addressed the effect of body bias (both forward and reverse bias) and temperature on snapback voltage in a Silicon On Insulator Lateral Diffused MOS (SOI-LDMOS) transistor for the first time. Controlled simulation experiments have been carried out on a representative LDMOS structure to develop physical insight regarding the effect of body bias on the device characteristics. For temperature effect, only the temperature dependence of IDS-VDS characteristics has been presented. The simulation results are expected to be useful for developing analytical model capable of including bias and temperature dependences and validating prevailing models. The forward body bias assists the parasitic bipolar transistor to turn on in lower drain to source voltage and reduces snapback voltage from ~ 50V to ~20V for the dimension and parameters given in Table 1. However, the snapback voltage is increased slowly in reverse body bias. Depending on application, optimum snapback voltage may be tuned by varying the body bias. The snapback voltage hardly changed with the temperature variation from 25°C to 125°C.