Adverse effects of digital calibration hardware on low-voltage operational amplifiers

This paper presents the analysis of digital calibration adverse effects, that arise from the connection of the calibration circuit to an operational amplifier being the circuit under calibration. In this way, the amplifier transfer function is affected and so are the frequency characteristics. Principles of the proposed calibration method are described. The calibration system was implemented in 130 nm CMOS technology node. In order to estimate arising adverse effects of calibration hardware on the amplifier performance, the small-signal analysis was performed. The detailed simulation results revealed the worst-case reduction of the VGA bandwidth to 87% and reduction of the gain-bandwidth to 75% with the calibration circuit connected. In the simulation analysis carried out, also mismatch, process parameters fluctuations and temperature variations have been considered.