Stochastic Propagation Delay Through a CMOS Inverter as a Consequence of Stochastic Power Supply Voltage—Part II: Modeling Examples

We provide, in detail, three examples of the application of our stochastic model (a companion paper in this journal) that provides analytical expressions for the probability distribution of the propagation delay time of logic signals through a CMOS inverter when the inverter power supply voltage V
_dd
(more precisely, gate voltage V
_GS
) is itself probabilistic for some reason (e.g., system noise or a random external electromagnetic disturbance). Since the propagation delay time is a function of the value of V
_dd
, then some values of V
_dd
may produce values of inverter propagation delay time that cause the circuit in which the inverter resides to malfunction (e.g., by resulting in a delay time value not conforming with the delay time margins for that circuit). The examples we present for some possible probability density functions (pdfs) for Vdd are 1) Gaussian density, 2) uniform density on a finite interval, and 3) delta density. The Gaussian density is an example of a continuous one, whereas the uniform density is an example of a discontinuous one; the delta density is of interest for providing guidance in handling discrete pdfs-not explicitly treated in the above referenced paper-since such pdfs may be represented as weighted sums of δ-functions. Based upon the derived inverter propagation delay time probability distribution, we derive, for the Gaussian density, a probability for the malfunction of a circuit containing a single inverter subject to such a stochastic V
_dd
.