Radiation-Hardening Techniques for Spin Orbit Torque-MRAM Peripheral Circuitry

Magnetic random access memory (MRAM) is experimentally proved intrinsically immune to radiation effects including heavy-ion irradiation and total ion dose as the data are represented by the spin instead of charges. Hence, it is considered as a promising candidate for aerospace and avionic electronics. However, its CMOS peripheral read/write circuits are much more vulnerable to radiation-induced single-event upset (SEU) and double-node upset (DNU) induced by charge sharing. This paper presents a novel radiation-hardening design of the peripheral circuitry for spin orbit torque (SOT)-MRAM to address abovementioned issues effectively. Transient simulations are performed based on a physics-based SOT-magnetic tunnel junction compact model and a 65 nm CMOS design kit. Simulation results validate that the proposed hardening read/write circuits are strongly robust against SEUs and DNUs. Furthermore, the proposed hardening read circuit shows the improvement of hardware area and reliability compared with the previous works.