From Design to Test: A High-Speed PRBS

A full-rate parallel pseudo random bit sequence (PRBS)-9 is systematically designed in the IBM 130-nm six-level metalization SiGe BiCMOS process with 2.5/3.3-V dual power supplies for the application of testing high-speed interconnects. The PRBS length and the phase difference between channels are studied using the methods of autocorrelation and cross correlation, respectively. The parallel PRBS streams can be used as stimuli for a serializer, and the autocorrelation method can be applied as a PRBS checker. It can also be used as stimuli for a four-level pulse amplitude modulation-4 signaling format transmitter with the least correlation between the LSB and the MSB by choosing the appropriate channel combinations. Two prototype boards are designed to test the PRBS along with an on-chip type-II third-order charge-pump phase-locked loop. Signal integrity issues are investigated. Finally, the PRBS has been demonstrated at board level with nonreturn-to-zero format operating at more than 10 Gb/s.