Optimization and verification of OpenVPX-based 10Gbps interconnection

As serial date rates migrate to 10Gbps and beyond, the list of signal integrity (SI) concerns and pitfalls grows. This paper focuses the design of SI of 10G serial link on OpenVPX system, and the research of the corresponding design and optimization methods based on passive design of 10Gbps high speed serial link. Combined pre-emphasis and equalization, the design enhances the quality of full link, reduces the bit error rate, and ensures accurate transmission of 10 Gbps serial signal, with margin left for system operation. With simulation and testing, the methods are verified to be accurate and feasible in this paper.