The Design of an RS Decoder Based on the mCS-RiBM Algorithm for 100 Gb/s Optical Communication Systems

In this brief, we propose the modified compensated simplified reformulated inversionless Berlekamp-Massey (mCS-RiBM) algorithm, which is proved to successfully remove one redundant processing element and eliminate one iteration in comparison to the original CS-RiBM algorithm. Given the requirements of high speed and low complexity, we design a 16-channel two-parallel RS-FEC architecture based on the mCS-RiBM algorithm for 100 Gb/s optical communication systems. To further increase the throughput, the technique of pipelining is adopted in the three blocks of the RS decoder. The proposed architecture has been designed and synthesized with TSMC 90-nm CMOS technology library. Synthesis results illustrate that the proposed architecture can operate up to 625 MHz, and achieve a throughput rate of 162 Gb/s with a total gate count of 255 400.