An Odd Phase CDR With Phase Interpolator Trimming

This brief presents an odd phase Bang-Bang phase detector-based CDR architecture that has a unique property that the clock phases sampling the data automatically become aligned to the center of the data. This eliminates both the residual phase error of the quadrature correction and the quadrature corrector loop itself. An adaptive closed loop weight trimming algorithm is proposed to suppress the non-linearity of phase interpolator (PI). With this algorithm, very high PI linearity is achieved. Additionally, the resulting linearity is maintained over process, voltage, temp. (PVT). A compensation method for the phase offsets of the multiphase clock going into the PI is proposed. Phase offset compensation reuses the same sensing block, which is used for PI trimming. After settling, a phase alignment error of of ≤ 1.7° is achieved. At 2.67-GHz clock frequency, the PI trimming achieves DNL ≤ 0.45 LSB and INL ≤ 0.43 LSB across PVT. The phase offsets to PI input are corrected to within ±2.5% of the ideal phase spacing.