An All-Digital High-Resolution Programmable Time-Difference Amplifier Based on Time Latch

In this paper, a novel programmable time-difference amplifier (TDA) with femtosecond resolution is presented. The proposed TDA design cascades three time latches and digital gates to amplify the input time difference with selectable gains. The time gain is simply determined by changing digital switches performing time addition. Based on digital gates, the proposed circuit achieves performance comparable to the state-of-the-art TDAs, without the limitations of analog components imposed by scaled CMOS processes. The proposed TDA is simulated in a 1V 65 nm TSMC CMOS process to validate the accuracy of the proposed architecture. The linearity of the proposed TDA is verified from 150 fs to 200 ps with a gain error of less than ±4%, while consuming 519 μW with a 450 MHz clock frequency.