High Linearity SAR ADC for High Performance Sensor System

This paper presents a capacitive array optimization technique capable to improve the Spurious Free Dynamic Range (SFDR) and Signal-to-Noise-and-Distortion Ratio (SNDR) of Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) for smart sensor specifications. Monte Carlo simulation results show that the proposed optimization technique makes the SFDR, SNDR and (Signal-to-Noise Ratio) SNR better definitely concentrated, which means with a spread between maximum and minimum value much smaller than the one obtained by conventional calibration techniques. This gives rise to more stable and better performances. The averaged SFDR improves from 72.9 dB to 91.1 dB with σu = 0.4%, the 18.2 dB improvement required an off-line processing and a small digital logic circuits.