Parallel Pseudo-Exhaustive Testing of Array Multipliers with Data-Controlled Segmentation

This paper presents a new method for pseudo-exhaustive testing of standard array multipliers using a novel approach of data-controlled segmentation of the circuit. The method covers both combinational and sequential fault classes. Differently from previous papers, the proposed separate cell-testing approach targets multiple faults in different cells and avoids fault masking. The method is also applicable to other multiplier architectures like Booth and MiniMIPS with high stuck-at fault (SAF) coverage. The regular structure of the test allows efficient implementation of the method as both software based self-test (SBST) and hardware-based BIST.