FPGA-based evaluation platform for disaggregated computing

Disaggregated computing aims at overcoming the problem of fixed resource proportionality in existing infrastructures while advancing resource allocation to virtual machines, which is currently restricted by the physical boundaries of a server tray. Organizing resources into large homogeneous pools (e.g., compute, memory, accelerators, etc) enables the demand-driven, fine-grained allocation of resources, effectively leading to improved resource utilization and significant power savings. However, the success of this approach relies on how efficiently the underlying resources are utilized by the software application. To facilitate software development in disaggregated computing environments, we introduce a versatile multi-FPGA evaluation platform that can serve as an early exploration tool for the involved trade-offs and execution alternatives given the application at hand. To increase functionality of the proposed development/evaluation platform, we consider three types of building blocks, namely compute, memory, and accelerator ones, providing the developer with the option to instantiate and interconnect them in proportion to the application demands, thus facilitating both compute- and memory-intensive applications. We have implemented a fully fledged prototype platform, based on three interconnected Zynq boards, and rely on a thin user-level API to allocate compute and memory resources on remote blocks, transfer data, and deploy reconfigurable accelerators. As a case study, we employ one of the Seven Dwarfs of Symbolic Computation, the matrix multiply benchmark.