A Voltage–Time Model for Memristive Devices

A novel electrical model that describes the time evolution of oxide memristive devices is proposed. Starting from some considerations about the physical characteristics of the resistance change in the active layer of these devices, the traditional model based on a resistor series has been improved and extended, solving some limitations pending in the classical interpretation. The low complexity of the proposed model is very profitable for the resistive memory designers as it is easy to be integrated in the traditional design flows. Experimental results for HfO2 devices implemented in a 250-nm BiCMOS process show an excellent match with the simulations achieved by using the proposed model and validate its effectiveness.