Design of 60 Ghz CMOS power amplifier to improve power added efficiency

This discourse used 45nm CMOS technology to model a power amplifier of class AB for a Power Added Efficiency (PAE) of 23% and power gain of lOdB at the 60GHz unlicensed band of frequency. This CMOS class-AB Power Amplifier (PA) is one of the important stages to enhance the power output of the transmitter chain. Here the designed power amplifier can be used for short range communication of 4m-20m applicable for Bluetooth operations. The proposed class AB amplifier yields a maximum efficiency of 68% at 60GHz. Common source configuration is employed in the driver stage to enhance the output power with single stage contours. Load stage is basically a MOS connected back to back to get the maximum output. A class AB power amplifier is adopted for its high power efficiency and better linearity. The measurement results indicated that the input match and the output gain at 60GHz achieves −18dB and 12dB respectively with the supply voltage of 900mV. The frequency response obtained is a narrow band response with 6GHz of bandwidth. Using Cadence Virtuoso tool circuit is simulated. Using Virtuoso Layout Editor the layout of the associated circuit is drawn with the total size of 0.107um
²
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