High voltage SiC super-cascode power switch parameter optimization for loss reduction

A method for voltage balancing capacitor selection of high voltage silicon carbide (SiC) Junction Gate Field Effect Transistor (JEFTs) based super-cascode power switch (SCPS) is presented in this paper. The proposed method can effectively reduce the device switching loss as well as thermal stress on critical components caused by repetitive avalanche. The basic operation principle of SCPS is shown at the beginning of the paper with critical modes. Then, equations to describe the voltage distribution among all the SiC JEFTs have been derived. Based on the derived equations, a sizing method of the SCPS voltage balancing capacitors is proposed to accelerate the device switching speed and minimize the avalanche time of its internal diodes. Compared with no voltage balancing capacitor case, the turn-on loss of the SCPS with sized capacitors has been reduced to 9.7%. The turn-off loss has been reduced to 48.4%.