Real-time sorting and lossless compression of data on FPGA

The method of data lossless compression with preliminary sorting in real time is considered in the paper. The compression method is based on the analysis of the frequency distribution of the incoming data stream, the selection of the constant by sorting and, on the basis of this, subsequent compression. The combination of sorting and data compression proposed in the article allows saving processing time and dynamically manage the network controller load. The hardware algorithm implementation on FPGA for sorting and compressing data during stream processing of information is considered. The solution makes it possible to implement an algorithm in the form of an IP core, with the ability to adapt it to the characteristics of solving its task of compressing data, thereby increasing system performance. This algorithm can be used to create embedded applications with limited computing resources and time-critical requirements. The device, based on the method considered, showed stable operation in the task of processing data from a multichannel system of high-speed sensors. This algorithm can be applied in solving problems of creation the telecommunications networks of distributed control systems, data processing subsystems Internet of Things and Internet of Robotic Things.