Synthesis of switched capacitor filters in a multi-level optimization environment

In this paper, the synthesis of switched capacitor (SC) filters in a multi-level optimization environment is presented. The environment is based on a high level optimizer and a circuit level optimizer. The non-idealities of the SC building blocks are considered at high level and incorporated as macromodels. This enables the accurate estimation of filter parameters which are passed to the circuit level optimizer for transistor level synthesis. The optimization strategy at circuit level combines evolution strategies with simulated annealing in finding the global optimum solution. The algorithmic details of the synthesis system are discussed and illustrated examples that demonstrate the validity of the approach are presented.