A dynamic dither /spl Sigma//spl Delta/ ADC with 103 dB DR for audio applications

A sigma-delta Analog to Digital Converter (ADC) using dynamic dither to achieve a tone-free Dynamic Range (DR) of 103 dB in an audio bandwidth is presented. The design was implemented using a 3rd order 2-1 cascade architecture with an oversampling ratio of 128. The ADC modulator consumes 22 mW from a 3.0 V power supply and was fabricated in 0.6 /spl mu/m CMOS (analog portion) and 0.3 /spl mu/m CMOS (digital portion) using Multi-Chip-Module (MCM) technology.