A new figure-of-merit for CML gate delay estimation

This paper introduces a Figure-of-Merit (FoM) for the evaluation of high-speed device performance. The proposed FoM is extracted from small-signal S-parameter measurements by manipulation of the Y-parameters. A group-delay value is calculated that can be closely related to the common-mode logic (CML) gate-delay of the device under test. A methodology is provided to accurately extract the proposed FoM, and it is experimentally compared to reported classical methods. The proposed method is very promising, because it can potentially replace the traditional labor and cost intensive evaluation approaches of building and measuring actual ring-oscillators and static-frequency dividers, with simple S-parameter measurements of single-device test structures.