Piezoelectronic transistor for low-voltage high-speed integrated electronics

Subthreshold- and near-subthreshold-voltage operations of CMOS logic systems are a highly effective technique for reducing their power consumption and optimizing their energy efficiency [1]. However, these low-voltage operations tremendously degrade the operation speed (frequency) of the systems, since deterioration of the current drivability of the transistors occurs owing to low-voltage operations. Furthermore, the ratio of the static power to the total power consumption in low-voltage operations increases with decreasing operation voltage [1]. In ultralow-voltage operations less than 0.2 V where considerable reduction in power consumption is expected, the severe deterioration of the current drivability and the thermal limitation of the leakage current are fundamentally insoluble for CMOS devices.