Comparative study on the NBTI effects based on different defect mechanism

This paper presents a comparative performance analysis on various flip-flops architecture with the presence of Negative Bias Temperature Instability (NBTI). The flip-flops are simulated under a different NBTI conditions by using a long-term NBTI model provided by Synopsys Hspice. The simulation results are verified using a 16nm High Performance Predictive Technology Model (PTM). The flip-flop speed and power consumption are considered to study the NBTI effects on the flipflops performance. The result shows that the circuit under defect with NIT and NOT mechanism produce lesser effect on the circuit performance compared to defect with NIT mechanism. Based on the observation in the reduction of the average PDP (Power Delay Product), the circuit under NIT and NOT mechanism produce up to ~1%-1.5% compared to the circuit under NIT and NOT mechanism which produce up to ~3%-5.5%. In conclusion, NBTI effect under defect with NIT and NOT mechanism produce the least degradation effect on the circuit performance compared to the other defect mechanism.