CIFR: A complete in-place fault remapping strategy for CMP cache using dynamic reuse distance

Dynamic voltage and frequency scaling puts threats to reliability in Chip Multiprocessors (CMPs). Cache being the most susceptible to faults, the fault tolerance techniques are necessary to ensure error free execution even if there are faults in cache. Existing fault tolerance techniques lack completeness in fault protection as well as harm effective capacity of the cache. They either remap faulty blocks to non-conflicting faulty blocks or use some auxiliary cache. This work proposes a fault remapping strategy that ensures completeness in fault protection without affecting the effective capacity of the Last Level Cache by remapping all effective faulty cache lines to either non-conflicting faulty cache lines or low-reusable healthy lines. The reusability is predicted using dynamic reuse distance analysis and cache lines are ranked by their protecting distance. Only the highly reusable faulty lines are considered for remapping to low reusable non-conflicting faulty lines. Failing that the low-reusable healthy lines are considered as the target and this avoids the requirement of any auxiliary cache. Cycle accurate simulation in Multi2Sim 5.0 with plethora of fault maps, in an octacore CMP architecture, reveals up to 38.73% increase in hit ratio over the existing fault remapping techniques.