A 0.1–6 GHz digital controlled variable gain low noise MMIC amplifier

This paper presents a 0.1-6 GHz digital controlled variable gain low noise MMIC amplifier using 0.15 μm GaAs pHEMT technology. The VGA is composed of three stages common source low noise amplifier (LNA) cascade and attenuator. The gain of proposed VGA is both controlled by LNA and attenuator. LNA provides a high gain which has a step 0.5 dB variable gain controlled by 2-bit and attenuator adjusts the gain by 4-bit according to requirement. To reduce the chip size and improve the input P1 dB, the design novelty utilizes the parallel pHEMTs as switches to control the gate bias path which extract the voltage from series resistor voltage divider circuit and realize the gain variable function. The simulate results of designed prototype achieves a gain range from 0.5 dB to 33.5 dB with a 0.5 dB step using 6 bits, the step error for small gain range and large gain range are within 0.2 dB and 1 dB, respectively. The operation bandwidth of 0.1-6 GHz centered at 3 GHz, minimum noise figure of 1.5 dB is obtained in the highest gain mode. The chip size of 2.3 × 1 mm
²
.