A Low Switching Noise and High-Efficiency Buck Converter Using a Continuous-Time Reconfigurable Delta-Sigma Modulator

This paper presents a delta-sigma modulation control scheme for buck converters that features a reconfigurable loop filter with a scalable sampling frequency for effective switching noise reduction and high conversion efficiency. Depending on the load current, the proposed controller changes the sampling frequency along with the delta-sigma modulator (DSM) structure to transform between third- and second-order loop filters. Thus, it maintains a robust noise shaping capability and reduces the power consumption over a wide load range. The loop filters are implemented with a single op-amp resonator to reduce multiple integrators into a single element and enhance controllability of the resonance. More power-efficient operation is obtained by a switching node assisted deadtime controller (SADTC) that regulates the body-diode conduction. The proposed DSM-based buck converter was fabricated on a 180 nm CMOS. A spurious-free output spectrum with a noise floor below −81 dBm was achieved across all sampling frequencies. It operated at a wide range sampling frequencies of 3.75–15 MHz and regulated the output in the range of 1.0–2.4 V with input voltages of 2.5–5.5 V. The output voltage ripples were maintained under 19 mV. The converter showed a conversion efficiency of better than 80% over a load range of 1–1000 mA with a peak efficiency of 95.4% at 125 mA.