Impacts of Trap-State Generation on Tunnel Thin-Film Transistor

In this paper, the positive bias temperature instability (PBTI) of the tunnel thin-film transistor (TFT) is well studied and compared with the conventional-TFT. The tunnel-TFT exhibits superior PBTI immunity at high temperature and shows distinct temperature dependence of PBTI from the conventional-TFT. This is due to different influences of trap-state generation on electrical behavior of the two devices. For the poly-Si tunnel-TFT featuring trap-assisted tunneling (TAT), the impact of trap-state generation on tunneling probability is found to be temperature dependent. At lower temperature, the TAT current of a tunnel-TFT is reduced due to the lower interband transition probability, resulting in pronounced temperature dependence on the additional generated trap states after electrical stress. Therefore, the worst PBTI behavior of a tunnel-TFT occurs when the device is stressed at low temperature. Our results may be helpful to further reliability investigation of tunneling devices.