A Lower Bound for the Hardware Complexity of FIR Filters

Shannon's channel capacity theorem states that in a communication channel the available power budget (SNR) dictates the maximum realizable data rate. A relevant question for FIR filters then is this: Given a hardware budget, can we similarly define a general upper bound on the performance capabilities of a realizable FIR filter? And if yes, how close are the hardware complexities of existing FIR filter designs in relation to such performance limitations? Herein, we investigate such questions and we present a practical approach to derive a lower bound for the minimal hardware budget required for a practical FIR filter realization of a given set of target filter specifications. We believe this to be an important insight for fully understanding the design complexities of FIR filters and for properly managing their power consumption expectations.