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Efficient design of full adder and subtractor using 5-input majority gate in QCA | IEEE Conference Publication | IEEE Xplore

Efficient design of full adder and subtractor using 5-input majority gate in QCA


Abstract:

Quantum dot cellular automata is the recent trend in the field of technology for the designing of any digital circuit involving inverters and majority gates that has the ...Show More

Abstract:

Quantum dot cellular automata is the recent trend in the field of technology for the designing of any digital circuit involving inverters and majority gates that has the potential to substitute the age old technology of CMOS at the order of Nano level. Herein a full adder and full subtractor circuit is proposed using 5-input majority gate. The new full adder and subtractor reduced the requirement of occupied area, number of cells and energy dissipation. QCAPro tool is used for the calculation of energy dissipation. QCA designer 2.0.3 is used to design and simulate the circuits. A 4-bit ripple carry adder is also designed by one bit full adder.
Date of Conference: 10-12 August 2017
Date Added to IEEE Xplore: 08 February 2018
ISBN Information:
Electronic ISSN: 2572-6129
Conference Location: Noida, India

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