Nano-Watt Class Energy-Efficient Capacitive Sensor Interface With On-Chip Temperature Drift Compensation

This paper presents a nano-watt class energy-efficient capacitive sensor interface with on-chip temperature compensation. To achieve both high resolution and sensing accuracies, we exploit the fundamental limits of a two-step incremental-ADC and present a systematic study on the optimal coarse/fine bit allocations in the presence of mismatch errors. Efficient hardware reuse is ensured by utilizing the same loop filter, capacitive DAC, and digital controller in coarse/fine conversions for both capacitance and temperature readouts. A reconfigurable pre-gain stage for both capacitance and temperature sensing and a block-based data weighted averaging scheme are also employed to improve the overall system efficiency with 60% control overhead reduction. Optimized biasing circuit and subthreshold-biased amplifier with indirect compensation are utilized to achieve high accuracy with nano-watt power. Fabricated in a standard 0.18-
$\mu \text{m}$
CMOS process, the chip prototype consumes only 570 nW and achieves measured capacitance and temperature sensing inaccuracies of ±0.17 fF (
$1\sigma$
) from 0 to 10.8 pF and ±0.18 °C (
$3\sigma$
) from 0 to 100 °C, respectively. System level verification with a commercial MEMS pressure sensor shows a measured pressure sensing error improvement of >
$150\times$
after temperature compensation.