Evaluating synthesis tools for hardware implementation on ZYBO board

The use of FPGAs in the past have proven the reliability and performance of such systems in the domain of processing power and speeding up software applications. However, FPGA designs need a considerable amount of time for implementation and testing. Due to the long time-to-market problem when using FPGAs, researchers and companies are seeking tools that can shorten this time. In this context, several tools have been developed that can automatically migrate sequential codes (C/C++) into hardware description languages codes suitable for implementing on FPGAs. Various techniques and directives which can be used in Vivado HLS to improve design performance. In this project, specifically Xillybus, SDSoC and Vivado HLS, and compare their performance and reliability