Hardware accelerators for the K-nearest neighbor algorithm using high level synthesis

Supervised machine-learning algorithms require relatively large amounts of runtime to perform training and/or classification. Therefore, a need exists to accelerate their runtime, especially for real-time applications. In this paper, we propose and compare several hardware accelerators for the K-Nearest Neighbor (K-NN) classification algorithm. The accelerators are developed using Xilinx Vivado High-Level Synthesis (HLS) and represent examples of semi-tightly coupled architectures. Our experimental results, based on standard benchmarks, show speedups ranging from 48x-168x.