How to derive the highest mobility from 2D FETs — A first-principle study

In this work, we present the first comprehensive mobility model for 2D semiconductor FETs that includes the effect of carrier scattering from both impurities and phonons. We also determine how the mobility changes with variation in device geometry, dielectric surrounding the device, the number of layers of the 2D semiconductor, the vertical electric field, the grain size, and the channel material. The model considers the mobile charge concentration and the defect concentration across grain boundaries, which is important in practical device design. Based on the developed model, we discuss and identify the relative contributions of each of these factors affecting mobility, and provide guidelines to process and device engineers to assist in fabricating 2D FETs with maximized mobility.