A space vector PWM method for three-level voltage source inverters

In this paper, a space vector PWM method for three-level inverters is presented. In the proposed technique, boundary restrictions can be easily incorporated to the harmonic distortion output voltages, to limit the minimum pulse width and to balance the voltages of the dc-link capacitor bank. The solutions obtained are simple algebraic equations relating directly the pulse widths of the gate signals to the phase reference voltages. Computer simulation results are used to demonstrate the main features of the proposed technique.