Energy-Efficient Write Scheme for Nonvolatile Resistive Crossbar Arrays With Selectors

The write operation of a resistive memory based on a one-selector-one-resistor (1S1R) crossbar array consumes significant energy and is dependent on the device and circuit characteristics as well as the bias scheme. In this paper, the energy efficiency of a crossbar array of a 1S1R configuration during a write operation is explored for the V/2 and V/3 bias schemes. The characteristics that affect the most energy-efficient bias scheme are demystified. The write energy of a crossbar array is modeled in terms of the array size, number of selected cells, and nonlinearity factor. For a specific array size and selector technology, the number of selected cells during a write operation can affect the choice of bias scheme. The effect of leakage current due to partially biased unselected cells is explored. Furthermore, an energy-efficient write operation based on a hybrid bias scheme is proposed to reduce the write energy. This write operation adaptively sets the bias scheme based on the number of selected cells to enhance overall energy efficiency. Energy improvements of more than two times are demonstrated with this hybrid bias scheme.