Comparative study of full adder circuit with 32nm MOSFET, DG-FinFET and CNTFET

In this paper, we study the performance of Full Adder circuit with three different FET devices, MOSFET, Double-Gate (DG) FinFET and CNTFET, in 32nm technology. The full adder circuit is implemented using two different logic styles, the conventional 28-transistor (28T) CMOS logic and Gate Diffusion Input (GDI) logic. Power consumption, delay and Power Delay Product (PDP) are investigated using LTspice and HSPICE simulations. CNTFET shows the best performance among the three with the least power consumption and delay.