How close to the CMOS voltage scaling limit for FinFET technology? — Near-threshold computing and stochastic computing

Ultra-low voltage/power design has caught lots of attention due to the ever-increasing energy efficiency concern. The scaling of supply voltage in conventional CMOS circuit design has been slowed down to ensure circuit performance and robustness in the presence of statistical device/process variations and transient device noise. Among the various efforts, near-threshold-voltage (NTV) design and stochastic computing (SC) are promising for ultra-low voltage applications and can push the supply voltage towards its scaling limit. This paper provides an overview of our recent investigations on NTV design and SC from technology perspective, especially for FinFETs.