Characteristics of Recessed-Gate TFETs With Line Tunneling

In this paper, we propose a recessed-gate tunneling field-effect transistor (TFET) to improve the on current of TFETs by increasing the tunnel area with line tunneling. We investigate the effects of the recessed-body thickness and the doping level on the device performance. For optimal device structures, our proposed n-TFET reaches 1.44 × 10
^-6
A/μm of on current and 3.22 × 10
⁹
ON/OFF current ratio. A minimum subthreshold swing SS
_min
= 28.3 mV/dec and an average swing SS
_avg
= 59.8 mV/dec over seven orders of drain current are achieved. In addition, complementary TFET inverters show good noise margins of NM
_H
= 65 mV (38.5 % V
_DD
) and NM
_L
= 77 mV (32.5 % V
_DD
) and also a high voltage gain even at V
_DD
= 0.2 V.