The architecture of an FPGA-style programmable fuzzy logic controller chip

In the search for a fuzzy logic equivalent of the FPGA, the authors have developed the design for a programmable fuzzy logic controller chip which can accept up to 4 inputs, provide up to 12 programmable membership functions to fuzzify those inputs, and provide up to 8 programmable singleton values from which an output can be synthesised. Up to 64 rules can be evaluated simultaneously. The analogue modules which perform the fuzzification, rule evaluation and defuzzification operations are interconnected in a programmable fashion, modelled on the structure of FPGAs. This design will require an area of about 6 mm/sup 2/ in 0.8 /spl mu/m CMOS technology and draw about 9 mA.