Ultra-Low Power High Stability 8T SRAM for Application in Object Tracking System

In this paper, an ultra-low power (ULP) 8T static random access memory (SRAM) is proposed. The proposed SRAM shows better results as compared with conventional SRAMs in terms of leakage power, write static noise margin, write-ability, read margin, and I
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. It is observed that the leakage power is reduced to 82× (times) and 75× as compared with the conventional 6T SRAM and read decoupled (RD)-8T SRAM, respectively, at 300 mV VDD. In addition, write static noise margin (WSNM), write trip point (WTP), read dynamic noise margin, and I
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ratio are also improved by 7.1%, 43%, 7.4%, and 74× than conventional 6T SRAM, respectively, at 0.3 V VDD. Moreover, the WSNM, WTP, and I
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values are improved by 6.67%, 7.14%, and 68× as compared with RD-8T SRAM, respectively, at 0.3 V VDD. Furthermore, a fast, reliable, less memory usage object tracking algorithm and implementation of its memory block using ULP 8T SRAM are proposed. A quadtree-based approach is employed to diminish the bounding box and to reduce the computations for fast and low power object tracking. This, in turn, minimizes the complexity of the algorithm and reduces the memory requirement for tracking. The proposed object detection and tracking method are based on macroblock resizing, which demonstrates an accuracy rate of 96.5%. In addition, the average total power consumption for object detection and tracking which includes writing, read and hold power is 1.63× and 1.45× lesser than C6T and RD8T SRAM at 0.3 V VDD.