Implementation and testing of openflow switch using FPGA

Over the years the network scenarios are drastically changing and posing serious demands like scalability, agility, re-configurability. Software-Defined Networks (SDN) seems to be a promising network architecture solution which decouples control and data planes and standardizes their communication via an OpenFlow protocol. Most networking giants have implemented and bought out various versions of OpenFlow Switches with improvised features. But these commercial switches are either too expensive or too closed to perform research work at college campus. In this paper we propose a Field Programmable Gate Array (FPGA) based OpenFlow Switch which is highly modular, parameterized and OpenFlow 1.1.0 compliant. This OpenFlow Switch is simulated using Very High Speed Integrated circuit Hardware Description Language (VHDL) in Xilinx Integrated Synthesis Environment (ISE) and is easily portable to various FPGA platforms and architecturally provides scope to run varieties of experiments to facilitate research.