Network-based priority buffer

The paper suggests very fast electronic solutions for priority buffers that take data from many potential sources, accumulate them in a register, and output the most priority item in run time in such a way that as soon as a new value arrives it is included in the set with all previously received and untreated items and properly handled. It is shown that such circuits are required for real time embedded and cyber-physical systems. The buffer was first simulated in a Java program (in software) that allows to verify the intended functionality and then prototyped in hardware using commercially available prototyping boards with field-programmable gate arrays and up-to-date design environment, namely Vivado 2017.1. The best-known alternatives are briefly described and analyzed. The results of experiments have shown that the proposed solutions consume comparable hardware resources and are significantly faster. They may be used not only for priority management but also for real-time data sort.