Analog floating-gate synapses for general-purpose VLSI neural computation

A floating-gate-based synapse structure for neural computing fabricated by a standard double-polysilicon CMOS process is presented. Simulation and experimental results on conductance programmability and charge retention demonstrate the capability of this programmable synapse circuit. With this circuit a neural chip of 100K synapses complexity can be constructed using one megabit static-RAM fabrication technologies.<
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