A novel CMOS positive to negative voltage converter and regulator

A novel positive to negative voltage converter and a novel LDO regulator are proposed in this paper. Compared with the conventional voltage converter, the proposed one has a higher efficiency for a certain process. The novel negative voltage LDO circuit has a good temperature characteristic with a simple and chip-saving control circuit. The proposed whole circuit is verified with simulation in CSMC 0.25um BCD process. A -5V stable output voltage and a 50mA output current is achieved with a +8V input voltage.