Retargetable functional simulator using high level processor models

The current embedded systems design typically also involves the design of application specific integrated processors. In such scenarios, the designer needs to study various designs for choosing the best suited one with respect to the performance and the cost. The use of high level processor models along with automated tools is becoming popular in the performance study of the designs. This work involves the design and implementation of a Retargetable Functional Simulator Generator (RFSG) which is capable of generating a functional simulator for a processor given its high level model in the Sim-nML language and a binary for the processor in ELF format. The functional simulator so generated simulates the binary program for the described processor on any other host. It can also produce an uncompressed instruction trace for the binary program.