A VHDL based Moore and Mealy FSM example for education

With recent technological advancements, modern societies are becoming more and more dependent on the automated machines. It is in order to cope with their fast-going lives. Modern automated machines adapt their sequence of actions depending on their environment and events. The FSM (Finite state machine) is used to mathematically express those sequences of actions or instructions. In this article two FSM machines types, Moore and Mealy, are discussed. Showing different results in order to demonstrate the importance of FSM modeling. An edge detector circuit is designed by employing both Moore and Mealy machines. It is a FSM design example, can be used for students concepts building and demonstration. These designs are implemented in VHDL. A comparison is also made based on both implementations.