Photoresist mask design for evaluation of resist-mediated charging effects during high current ion implantation

Although the effects of photoresist on wafer charging during high current ion implantation have been previously reported, the resist layouts did not always simulate resist placement on product wafers, making it difficult to determine how relevant the results were to charging experienced by product wafers. Building on previous work, this presentation describes a general approach to resist mask design, intended to emulate resist placement on product wafers. This approach is applied to the design of four-field reticles for use with the CHARM(R)-2 monitors to provide a tool for optimization of implant conditions to minimize resist-mediated charging on product wafers, and to provide a basis for empirically-based modeling of resist-mediated charging phenomena. Both dark-field and light-field designs are described. The masks described here were used in a comprehensive study of resist-mediated wafer charging on the Applied Materials 9500/spl times/R.