Challenges for advanced end of the roadmap, beyond Si and beyond CMOS technologies

Future technologies put stringent demands on materials, process modules and device architectures. Design considerations favor the future use of vertical devices like tunnelFETs and nanowires. Heterogenous integration of Ge and III-V technologies on a silicon platform enables to fabricate System-on-Chip applications, while increased functionality is achieved by 3D integration. Attention is also given to the trend and progress in the use of 2D material and devices, spintronics and neuromorphic computing.