Parameter optimization of high-speed CMOS operational amplifiers based on dual-input stage

The parameter optimization features of CMOS operational amplifiers (OA) based on dual-input-stage under constraints on power consumption, unity gain frequency, phase margin, open loop gain and compensation capacitance are considered. It is shown that the maximum slew rate of the output voltage is proportional to the DC currents of dual-input-stage due to the usage of current mirror based push-pull parallel channels. The recommendations to design of high-speed CMOS OA with wide range of dynamic characteristics are given.